• Create your own I/O hardware without VHDL coding or board design
• Graphically configure FPGAs on NI RIO hardware targets
• Define your own control algorithms with loop rates up to 40 MHz
• Execute multiple tasks simultaneously and deterministically
• Implement custom timing and triggering logic with 25 ns resolution
• Information based on current version

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Data Sheet

Data Sheet for LabVIEW FPGA