PXI-6561
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Overview
- LVDS signaling
- 200 Mb/s maximum data rate per-channel in double-data-rate mode
- Synchronization and Memory Core (SMC) device
- 16 channels with per-channel direction control in single-data-rate mode
- 2, 16, or 128 Mb/channel onboard memory
- 100 MHz maximum clock rate
- Information based on current version
Additional Resources
Data Sheet
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