The NI 5792 is an RF receiver with continuous frequency coverage from 200 MHz to 4.4 GHz, with 200 MHz of instantaneous bandwidth. It features a single-stage, direct conversion architecture that provides high bandwidth in the small form factor of an NI FlexRIO adapter module. The onboard synthesizer (local oscillator or LO) sets the center frequency for acquisition, and can be exported to other modules for multiple input, multiple output (MIMO) synchronization. The LO can also be imported from an external connector, enabling synchronization of up to eight NI 5792 modules.
The baseband analog-to-digital converters (ADCs) on the NI 5792 are 14-bit at 250 MS/s to provide a sufficient excess rate for 200 MHz bandwidth after any digital signal processor (DSP) resampling and frequency shifting. Direct access to raw ADC data on the NI FlexRIO FPGA module provides the ultimate flexibility in digital signal processing, data storage and streaming, and custom algorithm design for software defined radio (SDR), signal intelligence (SIGINT), streaming to and from disk, MIMO, beamforming, and other high-performance embedded RF applications. Additionally, the NI FlexRIO FPGA module and the PXI platform offer a means for ADC data synchronization, which is necessary for channel expansion. Twelve bidirectional digital I/O lines routed from the FPGA to a connector on the adapter module enable digital device under test (DUT) control and simple digital protocols. Though the NI 5792 is compatible with all NI PXIe-796x FPGA modules for NI FlexRIO, National Instruments recommends the NI PXIe-7966R to fit all of the provided LabVIEW FPGA software for RF configuration and DSP correction, in addition to any user code and IP. Examples for the NI 5792 are configured and compiled for only the NI PXIe-7966R FPGA modules.
RF performance on the NI 5792 is also exceptional given its size. RX dynamic range is greater than 105 dB, with a noise figure less than 8 dB at 2 GHz. The LO phase noise is better than 94 dBc/Hz at 2.4 GHz and a 10 kHz offset. All specifications are typical, and some require FPGA-based correction algorithms, which are provided in the form of example code.