NI R Series digital RIO devices feature 160 digital I/O lines and a 1M gate or 3M gate field-programmable gate array (FPGA) for onboard processing and flexible I/O operation. The FPGA chip is configured by creating NI LabVIEW block diagrams with the LabVIEW FPGA Module. Your block diagram executes in the hardware, giving you direct, immediate control over all of the I/O signals.
You can customize these devices to develop capabilities such as the following:
-Custom interfacing with digital communication protocols
-Counters, timers, pulse-width modulation (PWM), or flexible encoders on any channel
-Continuous pattern I/O or handshaking data transfer with custom triggering
-Watchdog timers, debounce filters, pattern matching, and change detection
-User-defined onboard decision making that executes with hardware-timed speed and reliability
For pricing and specifications, select an R Series device on the left or see the links below.