- Onboard FPGA chip, programmable with the LabVIEW FPGA Module
- User-defined triggering, timing, and decision making in hardware with 25 ns resolution
- Up to 8 analog inputs, independent sampling rates up to 750 kHz, 16-bit resolution, ±10 V
- Up to 8 analog outputs, independent update rates up to 1 MHz, 16-bit resolution, ±10 V
- 96 digital lines configurable as inputs, outputs, counters, or custom logic at rates up to 40 MHz
- Direct memory access (DMA) channels for high-speed data streaming
NI R Series multifunction RIO devices feature a dedicated analog-to-digital converter (ADC) per channel for independent timing and triggering. This offers specialized functionality such as multirate sampling and individual channel triggering, which are outside the capabilities of typical data acquisition hardware.
Common examples include the following:
-Hardware-in-the-loop (HIL) test
-Custom digital interfacing
-Other applications that require precise timing and control
Instead of a fixed ASIC for controlling device functionality, R Series offers a user-programmable FPGA chip for onboard processing and flexible I/O operation. The FPGA chip is configured by creating NI LabVIEW block diagrams with the LabVIEW FPGA Module. Your block diagram executes in the hardware, giving you direct, immediate control over all the I/O signals.