NI R Series multifunction RIO devices feature user-defined, onboard processing for complete flexibility of system timing and triggering. Instead of a fixed ASIC for controlling device functionality, R Series multifunction RIO hardware uses an FPGA-based system timing controller to make all analog and digital I/O channels configurable for application-specific operation. You can configure the FPGA by creating LabVIEW block diagrams with the LabVIEW FPGA Module. Your block diagram executes in the hardware, giving you direct, immediate control over all the I/O signals on the reconfigurable I/O (RIO) hardware. This process delivers high-performance, user-configurable timing and synchronization as well as onboard decision making at rates up to 80 MHz. With R Series multifunction RIO and LabVIEW FPGA, you can configure user-defined hardware for a wide variety of applications, such as custom discrete and analog control, simulation, digital protocol emulation, bit-error-rate testing, flexible triggering, and other applications that require precise timing and control.
R Series multifunction RIO devices contain a user-programmable Xilinx FPGA, up to eight analog inputs, up to eight analog outputs, and up to 160 digital I/O lines. You can customize these devices with the LabVIEW FPGA Module to develop capabilities such as the following:
-Complete control over the synchronization and timing of all signals and operations
-User-defined onboard decision making that executes with hardware-timed speed and reliability
-Individual configuration of digital lines as input, output, counter/timers, PWM, flexible encoder inputs, or user-defined communication protocols