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System Memory Requirements for Compiling LabVIEW FPGA Applications Although this memory requirement applies to typical designs, the unique characteristics of each design affect the memory utilization. The design complexity and constraints affect whether the FPGA Module can implement the design using more or less memory. URL: http://digital.ni.com/public.nsf/allkb/F89C3D88819B8DE68625744800815537

Why Do I Receive Error -42802 When Compiling My LabVIEW FPGA VI? I have a LabVIEW FPGA VI that uses the Fixed-Point Math Library. When I try to compile, I receive Error code: -42802 (refer to details). How can I fix this? URL: http://digital.ni.com/public.nsf/allkb/074FD972BC3ED90386257442007258B2

Why Does the cRIO Hangs when Resetting the Controller with System Reset? When I set the System Reset IO to TRUE on the FPGA, my cRIO hangs. Why does this happen? URL: http://digital.ni.com/public.nsf/allkb/C3B8A3D27D676FA08625744200528D94

NI 9219 Convert FXP to Thermocouple VI I am using NI-RIO 2.4 with fixed point I/O and an NI 9219 in a CompactRIO. How can I convert the FXP channel value in the real-time controller or host PC to temperature units, accounting for the CJC value? URL: http://digital.ni.com/public.nsf/allkb/22C1D4F68DD27B6286257434005EA8F7

Error -63001 NI-RIO FPGA Communications Occurs With DMA Transfers From Host to FPGA I am trying to do a DMA transfer from the 900x cRIO RT controller to the cRIO FPGA. The FPGA code compiles. However, when I run the code I get a Real-Time error saying the following: Error -63001: NI-RIO FPGA Communications.Framework: (Hex URL: http://digital.ni.com/public.nsf/allkb/257AF49E2110630F8625741F0062D292

在运行FPGA VI时会收到一条“Invalid Bitfile”的错误消息 在试图运行FPGA VI时，收到一条"Invalid Bitfile"的错误消息，而这个VI是刚刚被编译过的。为什么这个位流文件是无效的？ URL: http://digital.ni.com/public.nsf/allkb/CE5D1BAFB3CEF3C88625742B0005D766

Why Do I See Large Binary Values Coming From Coming from My Analog FPGA Reading I am seeing raw binary data that is outside of the range of my analog device. URL: http://digital.ni.com/public.nsf/allkb/7829D061AB7EF7F1862573E100702A2C

How do I access RIO devices on a networked computer? I have a system with an R-Series device that I would like to target from a different system on the network. Is this possible? URL: http://digital.ni.com/public.nsf/allkb/43F81436B97AEE28862573D40069F440

Why Do I Get A Resource Interface(s) Used in Multiple Clock Domains Error? I am compiling an FPGA VI for my CompactRIO system. I am using two digital I/O modules with one digital module being used in a timed loop using a derived clock, and the other module being used in a parallel while loop. When I try to compile I receive an error similar to the following: URL: http://digital.ni.com/public.nsf/allkb/0A933B88B50046B0862573D30007333E

LabVIEW FPGA Module 8.5.1 Readme File I do not have the LabVIEW FPGA Module 8.5.1 installed. Can I access the Readme file? URL: http://digital.ni.com/public.nsf/allkb/A804E2A62A32B53E862573D0007F5DEE