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Error -63001 NI-RIO FPGA Communications Occurs With DMA Transfers From Host to FPGA I am trying to do a DMA transfer from the 900x cRIO RT controller to the cRIO FPGA. The FPGA code compiles. However, when I run the code I get a Real-Time error saying the following: Error -63001: NI-RIO FPGA Communications.Framework: (Hex URL: http://digital.ni.com/public.nsf/allkb/257AF49E2110630F8625741F0062D292

Input or Output Bundlers Move out of Viewing Area using Statechart Module When using LabVIEW Statechart module, and configuring a state or transition, the input or output clusters are moved out of the viewing area (as seen below). Why does this happen? URL: http://digital.ni.com/public.nsf/allkb/6494E3A1C2132C4E8625741200770966

MAX Crashes after Rebooting a RT PXI-8104 with Several Devices that Support TEDS Measurement and Automation Explorer (MAX) crashes when rebooting a connected Real-Time (RT) controller that has TEDs devices installed. URL: http://digital.ni.com/public.nsf/allkb/97BAAADF2481903B862573F300786DD0

在运行FPGA VI时会收到一条“Invalid Bitfile”的错误消息 在试图运行FPGA VI时，收到一条"Invalid Bitfile"的错误消息，而这个VI是刚刚被编译过的。为什么这个位流文件是无效的？ URL: http://digital.ni.com/public.nsf/allkb/CE5D1BAFB3CEF3C88625742B0005D766

Why Am I Getting Error -1950679035 When I Try to Deploy My Shared Variables? When I try to deploy my shared variables, I keep getting error -1950679035. I have checked the path of my shared variables and they seem to be correct. How can I fix this issue? URL: http://digital.ni.com/public.nsf/allkb/68A2B87088BF9562862573E30008099B

Linker Error on Multiple Builds in a LabVIEW Blackfin Project I am getting a linker error on the third or fourth build in a LabVIEW Blackfin Project. What do I do? URL: http://digital.ni.com/public.nsf/allkb/BCD5FC03F3461947862573D80071A7D1

Why Do I Get A Resource Interface(s) Used in Multiple Clock Domains Error? I am compiling an FPGA VI for my CompactRIO system. I am using two digital I/O modules with one digital module being used in a timed loop using a derived clock, and the other module being used in a parallel while loop. When I try to compile I receive an error similar to the following: URL: http://digital.ni.com/public.nsf/allkb/0A933B88B50046B0862573D30007333E

Issues with the Control Design Instance of the Discrete Transfer Function (SISO) Why do I get incorrect results when I use the Control Design Transfer Function as an input to the SISO instance of the Discrete Transfer Function? When I use the Simulation Transfer Function as an input, everything seems to work fine. Also, when I use an array as an input instead of a single URL: http://digital.ni.com/public.nsf/allkb/86E964554A82B98B862573D000667F6D

Why Do I Have a Broken Wire When Passing My FPGA VI Reference Into a SubVI? When passing an FPGA VI Reference wire into a subVI, the wire that was once solid is now broken. The error message states that I have connected two clusters of different elements. How do I fix this? URL: http://digital.ni.com/public.nsf/allkb/7E0D73FF59368E5A862573B600692E52

How Do I Fix a *.c Error When I Try to Run an EXE on My TPC-2006? Every time I try to run a LabVIEW EXE on my TPC-2006 I get the following error: Pocket PC *.c is a missing VI or c file. LVforms.h is a missing VI or c file I have even tried running shipping examples but I constantly get this URL: http://digital.ni.com/public.nsf/allkb/5E9796BD30A6C644862573860071EBE0