Hardware Reset of a TIO (NI 660x) Counter
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Filename: hardwareresetcounterlv5.llb
Requirements: View
This VI uses two counters, counter 0 and counter 1. Counter 0 is configured to either increment or decrement on every rising edge on the default source pin. Counter 1 is configured for pulse train generation, generating the frequency that is the inverse of the time interval to reset counter 0. For example, to reset counter 0 to zero every 100 ms, set the frequency that is generated by counter 1 to 10 Hz on the VI front panel.
To control the counter 0 counting direction, connect the up/down pin of counter 0 to 5 V for the counter 0 to count up, or to GND for the counter 0 to count down.
Note: Be careful when choosing a duty cycle for the pulse generated by counter 1. Pulses which arrive at the source pin of counter 0 while the gate of counter 0 (output of counter 1) is high are not counted. Set the duty cycle so the reset pulse is shorter than the incoming pulses at the source pin.
I/O Connections:
- Connect CTR 0 source to the pulse train to count.
- Connect CTR 0 Up/Down to 5 V to count up, or to GND to count down.
- Connect CTR 1 out to CTR 0 gate.
Requirements
Filename: hardwareresetcounterlv5.llb
Software Requirements
Application Software: LabVIEW Full Development System 5.0
Language(s): LabVIEW
Hardware Requirements
Hardware Group: Multifunction DAQ (MIO)
Driver: Traditional NI-DAQ (Legacy) 6.6.0
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