Customer Solutions

A Low-Cost, Expandable, PXI-Based Solution for Mixed-Signal ASIC Test

Author(s):

M. Cem Karahan, Cal. Bay Systems, Inc.; N.D Smith, Cal. Bay Systems, Inc.

Industry:

Industrial Controls/ Devices/ Systems, Machines/Mechanics, Research

Product:

LabVIEW, PXI/CompactPCI

The Challenge:

Developing a flexible test system for characterizing new application-specific integrate circuits (ASICs).

The Solution:

Implementing a PXI-based system complete with software written in National Instruments LabVIEW that allows for easy channel count expansion by leveraging the NI Synchronization and Memory Core (SMC) architecture.

The image above reflects the controlling software designed by Cal-Bay for this project.

Timely characterization and debug data is critical to getting new ASIC designs to market quickly. PXI instruments and LabVIEW enable custom characterization systems that would previously have been difficult to create quickly. We used several NI PXI-6552 platforms to create a custom scan-chain test system, enabling rapid debug of an ASIC design.

A fabless semiconductor startup challenged National Instruments and Cal-Bay Systems to develop a verification platform to test their mixed-signal ASICs. Debugging a new ASIC is an iterative process; test results may determine the requirements of the next test.  Delays associated with running custom test protocols on traditional automated test equipment (ATE) at the foundry resulted in unacceptable delays in time-to-market. Placing the design validation test system in the hands of the design engineers allowed ASIC debug time to be reduced by a factor of  five.

After the initial test system was deployed, test data showed that more channels would be needed to debug the ASIC design. The National Instruments LabVIEW  and PXI platforms allow channel expansion by adding modular instruments which can be configured to work together as one instrument through the NI SMC device.

Deep On-Board Memory, Hardware Compare, and Low-Level Control via Bidirectionality

Scan-chain testing of ASICs allows designers to access many registers inside an ASIC via the Scan Chain interface which typically has only a few I/O pins.  Scan-chain testing requires the generation of millions of digital waveforms (stimuli) to the ASIC while at the same time acquiring and comparing the actual response of the ASIC to the expected response. The NI PXI-6652 card can be used for both generation and acquisition in scan-chain tests.

Each digital line of an NI PXI-6652 card has  tristate capability, allowing for this dual-mode operation.  With tristate operation, the possible states associated with a digital line are not limited to the traditional 1 (drive high) and 0 (drive low). For lines configured as inputs, a comparison engine measures the ASIC’s response to the given stimuli and compares this response to the expected value in hardware. These capabilities make it possible to manage the individual registers in the ASIC in a tightly controlled manner on a per-cycle basis. The NI PXI-6652 also allows the programmer to compensate for transmission line delays by applying a fixed delay to a selected list of channels. 

Finally, the ASIC test design is not limited to a single logic family, as programmable logic levels are allowed. All of these features make it possible to design a highly flexible and highly customized test for an ASIC.

Efficient and Effective Software Development with NI LabVIEW

The key requirement in this application was allowing test engineers to quickly define digital waveforms to generate and compare against. The customer had a desire to use text files to accomplish this task. As such, the system software used native LabVIEW file I/O libraries to read millions of ‘vectors’ from text files.  Next, NI-HSDIO driver libraries were utilized to implement the digital waveform generation and hardware compare features. Hardware compare functionality reduces the overhead associated with the comparison task allowing comparisons to be made spontaneously with no coding or very little post-processing. Design engineers can review test results via intuitive waveform graph controls, text-based reports, and mismatched vector displays. Displays of mismatched vectors permit design engineers to quickly 'drill down' into the large data sets. 

NI SMC Allows for Easy Expandability
A main factor driving costs in Automated Test hardware is channel count. Generally speaking, more channels drive the cost of a data acquisition system higher. Adding more channels after the initial design may be expensive or impossible.  National Instruments T-Clock Technology for Timing and Synchronization solves this problem by allowing multiple devices to be synchronized with minimum modification to existing hardware and software, giving the test design engineers the ability to add more channels seamlessly. Cal-Bay engineers were actually challenged to put this technology to use during this project. 

After the initial development phase was completed for 20 digital I/O channels, the customer expressed desire to use the same software architecture with a total of 40 channels. This upgrade was completed flawlessly and in short order thanks to NI SMC technology on the hardware front. On the software side, as the original software design employed principles of a modular architecture, addition of extra channels to the system was a relatively minor task.

• Per-Cycle bidirectional control of individual digital I/O lines coupled with features such as tristate operation, Hardware comparison, programmable voltage level support, and channel time delay, make the NI PXI-655x family of modular instruments a formidable alternative to traditional high-cost ATE’s.
• LabVIEW native software libraries and free drivers that ship with NI modular instruments reduce the time and risk associated with the usual software development process. 
• NI’s SMC technology allows for easy introduction of additional digital I/O channels, seamlessly expanding the existing system in short order.

 

For more information, contact:

M. Cem Karahan

Cal. Bay Systems, Inc.

3070 Kerner Blvd., SuiteB

San Rafael, CA 94901

Tel: (415) 258 - 9400

Fax: (415) 258-9288

E-mail: cem@calbay.com