Customer SolutionsHardware-in-the-Loop Made Easy with NI LabVIEW Real-Time and PXI
Author(s):Shahzad Sarwar, Averna Technologies Inc
Industry:Aerospace/Avionics
Product:LabVIEW, LabVIEW Real-Time, PXI/CompactPCI
The Challenge:Creating a hardware-in-the-loop platform with a deterministic loop rate of 1,000 iterations per second, managing a high count of 600 I/Os, scalable to 2,000 channels without performance deterioration, integrating more than 10 nodes running device models in real-time, sharing simulation and I/O data with a timing jitter of 10 millionth of a second – all achieved with a strict delivery schedule and high cost effectiveness.
The Solution:Using multiple PXI chassis and a wide range of PXI modules with analog and digital I/O along with ARINC-429 hardware integrated with an efficient software, developed with National Instruments LabVIEW Real-Time Module on PXI nodes and NI LabVIEW on MS Windows nodes, networked by reflective memory boards and TCP/IP.Introduction and Requirements Aerospace and automotive design engineers have benefited from cycle time reduction using hardware-in-the-loop facilities for many years. Engineers can simulate design models for new products at high speeds and interface with input and output signals from existing hardware in real time, thus iterating and validating the design with unprecedented efficiency. As such systems begin to play a major role in design activities, there is a new demand for cost-effective implementation of flexible, high-performance hardware-in-the loop facilities. Capability to integrate multi-vendor technology and use of off-the-shelf components is often dictated by time, cost, and maintenance considerations. NI LabVIEW and PXI offer an ideal platform for conceiving such solutions. Our customer, THALES Canada, Aerospace Division, innovatively engaged in design of modern fly-by-wire controllers, needed a strategic renewal of their design validation facility using a hardware-in-the-loop system. The system required deterministic integration of several hundreds of data channels and a system composed of device models executed on more than ten computing nodes. Interdependency of these multiple nodes also required that any computed or acquired data be transmitted, system-wide, with a low latency of 10 ms. To capture any system transients, the system required a loop rate of 1 kHz to synchronously acquire all input signals, update all outputs, and step through the model computation. Compatibility of new hardware-in-the-loop facility for future products required a flexible system with dynamic association of hardware resources to physical signals, scalability to 2,000 channels without any performance deterioration, and rugged sanity checks of system integrity while being configured for new test set-ups. The solution also required an exhaustive logging of all data and an equally flexible and dynamic real-time graphical and tabular data viewing through multiple access controlled computers. The THALES Engineering team elaborated all performance requirements and outsourced the system technical design and implementation to Averna Technologies. Below is Averna’s solution to this challenging set of requirements. System Design A strict delivery schedule of five months and a competitive cost effectiveness requirement added further constraints to the design of this already technically challenging system. The National Instruments PXI product line was identified as a natural and excellent platform to implement the system. Availability of embedded real-time controllers, wide range of NI modules for analog and digital I/O, openness to non-NI vendors for ARINC-429, reflective memory and IRIG-B synchronization boards, along with rapid software development made possible by LabVIEW Real-Time and LabVIEW were essential parts of the engineering elegance of solution shown in the following high-level architecture. Signal Conditioning and Data Acquisition Given the varied and custom nature of signals originating from field transducers LVDTs and RVDTs, a custom signal conditioning hardware was designed and implemented to amplify the signals, provide isolation, along with synchronized sample and functionality. The conditioned signals are wired to I/O modules from NI housed in multiple PXI chassis. The PXI platform provides the needed modularity and system scalability along with precise timing synchronization and distribution of real-time clock. In the early phases of system development, we successfully verified that a fully populated PXI chassis could perform full speed data acquisition at 1 kHz without creating any throughput bottlenecks. Throughput and determinism checks were also successful for TCP/IP, reflective memory and even including CPU interrupt times, making critical design review of system. Application Software System configuration is stored in a Windows database of tag names, hardware channel association, acquisition rates, engineering conversion, and system calibration information. LabVIEW allows composing hardware resources and database information into system configurations targeted for specific device tests. Once composed, the configuration is checked for system integrity and throughput requirements and downloaded to embedded targets running LabVIEW Real-Time on PXI nodes. LabVIEW Real-Time initializes the entire system and uses PXI timing module to synchronize all PXI nodes. We developed a custom FPGA personality code for PXI-7831R board of generating IRIG-B synchronization signal to synchronize ARINC transceiver modules with the PXI clock. The time critical code on PXI RT controllers now handshakes with signal conditioning hardware and deterministically acquires the input signals and updates outputs; all I/O taking place at the same clock edge. Simulation nodes run Simulink device models on more than 10 desktop nodes. All PXI and simulation nodes share the data and execute system commands through a reflective memory network that ensures a low latency of 250 ns from node to node. A custom command interpreter was developed, using LabVIEW Real-Time, that provides remote CPU interrupt and procedure invocation capabilities through reflective memory. LabVIEW Real-Time and PXI also interface with a number of ARINC-429 transceivers providing an extensive communication, word definition and ARINC pollution capabilities with some of the related virtual instruments. System Monitoring All test data is transferred in real time to a remote node for disk storage using a static reflective memory ring buffer. Transferred data is available to multiple monitoring nodes that can view the real time data as well as logged data for test analysis. A number of LabVIEW-based virtual instruments allow engineers to flexibly define the graphical and tabular data viewing displays. The presented solution integrates diverse, modular technology products. Whereas the system currently works with a PXI channel count of 600, we tested its scalability and extension to thousands of channels by adding more PXI chassis and it causes no performance deterioration. LabVIEW, LabVIEW RT and PXI were the key factors of making this flexible, high-throughput, low-latency hardware-in-the-loop system a remarkable success while saving more than $200,000 in implementation cost and several months on development time. For more information, contact: Shahzad Sarwar Averna Technologies, Inc. 700 Tel: (514) 842-7577
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