Semiconductor Carrier Profiling at Sub-10 nm Lithography Nodes

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"We found the PXIe-5668R VSA to be optimal for this application. . . . In the final instrument, we plan to have the VSA, the controller for our modified STM, and an onboard computer mounted in a single PXI Express chassis. This will make the system portable and low in weight, but will also provide consistent cooling, and reduce electrical interference. This system gives us the deepest level of customization, which would not be possible with a commercial STM."

- Jeremy Wiedemeier, NewPath Research LLC

The Challenge:
NewPath Research needed to develop a system for non-destructive, high-resolution carrier profiling with sub-nm resolution to support the semiconductor industry as it progresses to the new sub-10 nm lithography nodes.

The Solution:
The technique developed focuses a mode-locked ultrafast laser on the tunneling junction of a scanning tunneling microscope, which is controlled using LabVIEW, to generate a sequence of current pulses in a semiconductor sample. In the frequency domain this is a microwave frequency comb with harmonics at multiples of the laser pulse repetition frequency. NewPath used a PXIe-5668R vector signal analyzer to measure the attenuation of the harmonics to determine the carrier concentration at the sub-nm tunneling junction.

Jeremy Wiedemeier - NewPath Research LLC
Mark Hagmann - NewPath Research LLC
Greg Spencer - NewPath Research LLC
Nolan Matthews - NewPath Research LLC

NewPath Research

NewPath Research LLC conducts research to better understand selected topics of basic science and apply the results to meet the need for advanced technology. For example, we patented and developed noninvasive methods to measure RF current used by the Department of Defense, NASA, and the National Institute for Occupational Safety and Health, and new wideband-tunable microwave and terahertz sources. For the last five years we focused on developing a new instrument for semiconductor metrology.


The Need for Sub-nm Resolution

In June 2017, IBM introduced the 5 nm node for semiconductor lithography. Road maps for the semiconductor industry specify that the resolution in carrier profiling of semiconductors must be finer than 10 percent of the dimension at each node. However, present methods for carrier profiling cannot provide a resolution much finer than 50 nm. This is 100 times coarser than the 5 nm node requirement, and this problem will intensify in the next step to the 2 nm node. Furthermore, the present methods for carrier profiling require probe insertion, so we cannot use these with fragile samples such as graphene or 3D devices such as fin field-effect transistors.

We needed to develop a new instrument to enable the non-destructive carrier profiling with sub-nm resolution. With funding from the National Science Foundation and the U.S. Department of Energy, we are developing a new technique that we call Scanning Frequency Comb Microscopy (SFCM) to meet this challenge.


The NewPath Solution

We first generated a microwave frequency comb by using metal samples in a scanning tunneling microscope (STM) as shown in Figure 1. A mode-locked ultrafast laser focused on the tunneling junction superimposes a pulsed periodic current on the DC tunneling current. In the frequency domain, this is a microwave frequency comb (MFC) having hundreds of harmonics at integer multiples of the laser pulse repetition frequency.

Figure 1. STM With Gold Bead Sample


Figure 1 shows a gold bead sample mounted on miniature coaxial cable within the sample holder for the STM. Using a gold sample in the STM, with a laser having an average power of 50 mW, a pulse width τ = 15 fs, and a pulse repetition frequency of 74.254 MHz, we have measured the first 200 harmonics from 74.25 MHz (n = 1) to 14.85 GHz (n = 200). Due to the state-of-the-art narrow linewidth (< 0.1 Hz), even at the 200th harmonic, the S/N is typically greater than 45 dB. Within the tunneling junction the harmonics continue to 1/2τ (≈ 33 THz).

With metal samples, such as the gold bead shown in Figure 1, we measure the MFC with a Bias-T in the sample circuit. However, with a semiconductor sample, each laser pulse creates a pulse of minority carriers, and each carrier pulse is rapidly attenuated by scattering and dielectric relaxation and dispersed by coulomb repulsion during transport (see Figure 2).

Figure 2. Generation and Transport of Carriers During Each Laser Pulse for N-Type and P-Type Semiconductors (The polarity of the bias is chosen so that each tunneling junction is forward biased.)


Each laser pulse creates a sub-nm spot of surface charge of minority carriers at the base of the tunneling junction. Intense repulsion causes these carriers to move outward in a “coulomb explosion” as the majority carriers in the semiconductor are attracted and move inward. Each pulse of minority carriers has an initial length comparable to that of the laser pulse (for example 15 fs). However, dispersion in the outward transport of the minority carriers causes the pulse length to increase as it propagates so the higher harmonics decrease sharply during transport. Thus, the MFC must be measured with a surface probe less than 100 μm from the tunneling junction (see Figure 3).

The attenuation of the MFC is proportional to the sample’s spreading resistance present in the tunneling junction; with this spreading resistance known, we can determine the carrier concentration. Then, changing the spot size of the current at the surface of the sample enables averaging over different depths to obtain 3D information of the carrier density.


Figure 3. Diagram of Apparatus for Measuring the MFC With a Semiconductor


Our first measurements of the MFC in a semiconductor were made at Los Alamos National Laboratory using a PXIE-5668R high-performance vector signal analyzer (VSA). We found the VSA to be optimal for this application. For example, we could continuously vary the resolution bandwidth when optimizing

detection of the MFC. In the final instrument, we plan to have the VSA, the controller for our modified STM, and an onboard computer mounted in a single PXI Express chassis. This will make the system portable and low in weight, but will also provide consistent cooling, and reduce electrical interference. This system gives us the deepest level of customization, which would not be possible with a commercial STM. The ease of using LabVIEW with the VSA made it possible to write software to generate and analyze large data files with selected parameters and sequences of the individual microwave harmonics.

The present method of choice for carrier profiling below the 20 nm node is Scanning Spreading Resistance Microscopy (SSRM). In SSRM, a diamond probe is inserted into the semiconductor to measure the spreading resistance with a typical contact radius of 50 nm, and the carrier density is determined from the spreading resistance. By contrast, in our method of SFCM, the sub-nm tunneling junction replaces the diamond probe and the spreading resistance is determined by measuring the attenuation of the MFC. In our system, the spreading resistance is typically 10 MΩ so it is the major cause of attenuation for the MFC when the surface probe is close to the tunneling junction.

We have made a detailed analysis of the resolution of SSRM and SFCM, and have four issued patents, four filed patent applications, and three provisional patent applications that specifically cover SFCM.



Our patented method of SFCM is being considered as an alternative to present methods for the carrier profiling of semiconductors at and below the 10 nm lithography node. This new method uses a tunneling junction instead of inserting diamond probes so that (1) sub-nm resolution is possible, (2) the semiconductor is not altered, (3) the effects of changes to a probe during each scan are mitigated, and (4) the spot size may be changed to determine the carrier density as a function of depth. This improvement in metrology shows promise for mitigating the stagnation of reliable capacity that we have seen as the chip capacity in flash memory increased by a factor of 100 over an eight-year period.


What Is Next?

Measurements of the MFC with GaN and silicon samples having different doping as well as silicon standards are now in progress at Los Alamos. Metrologists at GLOBALFOUNDRIES, IBM, and Micron Technology agree that the present methods of carrier profiling are inadequate for sub-10 nm lithography and look forward to seeing a demonstration of SFCM at Los Alamos.

To provide a virtual hands-on demonstration of our new method, we have developed a LabVIEW VI simulating the full operation of an STM and placed it on our website ( as a free download. Figure 4 shows the main display screen of the STM simulator during operation. We are now developing a second free download VI that simulates the full operation of SFCM.

We are also upgrading our “homemade” STM (see Figure 5) to have real-time deterministic control by implementing the STM and SFCM simulators using the LabVIEW Real-Time and LabVIEW FPGA Modules. Figure 6 shows our first in-house implementation of the surface probe introduced in Figure 3.


Figure 4. Main Display Screen of Our STM Simulator During Operation


Figure 5. Our In-House STM

Figure 6. First Implementation of a Surface Probe


This work is supported by the National Science Foundation under Grant 1648811.


Author Information:
Jeremy Wiedemeier
NewPath Research LLC
2880 S. Main St.
Salt Lake City, UT 84115

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