New NI PXI-Based Power Supply Sequencing Tester: Making a Big Difference

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"The single setup as opposed to the traditional benchtop equivalent (Keithley and Agilent) saves an estimated $20,000. This cost savings comes from the modules, space and energy, and development."

- Junifer B. Frenila, Analog Devices Inc. Philippines

The Challenge:
Establishing power supply sequencing (PSS) tester capability at Analog Devices Inc. Philippines (ADIPhils) to eliminate the cycle time on shipping devices to offshore sites for testing.

The Solution:
Building a PSS tester based on PXI modules and LabVIEW system design software to accommodate testing with a cheaper and more flexible solution.

Junifer B. Frenila - Analog Devices Inc. Philippines
Bien Verlito A. Javier - Analog Devices Inc. Philippines
Meriam C. Yuson - Analog Devices Inc. Philippines
Jessy P. Cantor - Analog Devices Inc. Philippines

Adversity and Innovation

All new products at Analog Devices Inc. (ADI) undergo PSS procedures during the product evaluation stage. Products evaluated at ADIPhils need to be shipped to other ADI sites for PSS testing and then returned for verification. The lack of a PSS tester prompted us to develop one for a faster turnaround of evaluation results. Our main objective was to build a tester with similar performance to the existing PSS tester. We did not intend to replicate the existing tester, hence, were motivated to produce a much better solution.

We have extensively used PXI products at ADIPhils laboratories and test floors. With ease of use in mind, we initiated the idea of creating a PSS tester by integrating PXI modules. We identified several advantages of using NI products, such as cost-effective, compact, portable, and low maintenance.

The Hardware

The hardware is composed of the chassis with modules installed and the generic board on top. As Figure 1 shows, we used the PXIe-1065 hybrid 18-slot chassis without controller. We opted to use an ADI standard compliance’s laptop as a controller. The modules comprised HSDIO, switch matrix, and a mix of single- and quad-channel, low- and high-voltage source measure units (SMUs). The HSDIO is up to 32 channels, with software-selectable logic levels, and with midrange clock speed capability. The switch is fixed configured as a dual 8 x 32 matrix. Lastly, the SMUs provide up to 15 channels of power supply capacity. We did not use all the 32 channels of HSDIO and 15 channels of SMU in the PSS tester.

Figure 1. PXI Chassis With Installed Modules


Figure 2 shows a custom-built board frame in which the generic board is attached, and the actual evaluation board and side view of the setup. To limit the tester’s footprint, we designed and developed a custom frame. It is situated on top of the chassis and uses hinges and screws to open and close and hold onto its position, respectively. We needed to open it only when setting up the resources and during engineering debug. Otherwise, it was always closed and locked to avoid possible interruptions during device under test (DUT) testing.

Figure 2. Design and Snapshots of the Board Frame, Actual Evaluation Board, and Setup Side View


Figure 3 shows the complete setup with cables and connectors from the PXI resources going through the board. We used an MXI-Express card adapter to connect the chassis and controller. The generic DUT socket sits on top of the board, while the connector terminals settle at the bottom for a cleaner look. The operator just needs to place the DUT into the socket, then the succeeding tasks, including setting conditions and initiating the testing process, will be on the GUI.

Figure 3. Front View of the Complete Setup

The Software

We developed the GUI using LabVIEW programming software. Figure 4 shows the front panel, which consists of eight tabs (from left to right) with a specific purpose for each. The GUI’s operation follows the basic tester design concept and starts with the initialization of resources, which includes reset, self-test, and self-calibration of each module installed. Depending on the number of supply requirements for a specific DUT, PSS orders are created in the second tab. To more easily identify supply names versus the DUT pins, the operator must type in the wanted PSU names in the third tab. The DUT pin mapping interface in the fourth tab is important because it automatically maps the resources into their respective DUT pins. In cases where the DUT registers need to be configured first before doing the sequence, the part can be accessed through the Write Digital Pattern to the DUT tab. Golden sequence is identified to guide customers for a proper sequence of powering up DUTs in their applications. This can be found also in the released data sheet of the device or product. To prove that the DUT is robust in terms of power-up sequences, it should pass against the limits of four tests, namely Golden, Standard PSS, Ground, and Open Sequences. Finally, after these four sequences complete testing and pass, we can save and further examine the results offline.

Figure 4. Set Current Limits & Begin Testing Tab on the GUI Front Panel

Figure 5 shows the block diagram for the GUI, which we developed based on the Producer/Consumer Design Pattern Event structure. We identified this to work seamlessly with the needs of a PSS tester. With the Event structure, only the intended changes on the front panel will have the equivalent actions in the block diagram. Also, this structure can further simplify post development when some tests need to be added to the existing program. We need only to insert the Case for each additional function in the Producer and Consumer rather than break and restructure the existing code.

Figure 5. GUI Block Diagram


The flowchart in Figure 6 outlines how the tester functions and tests are carried out. It also shows how to generate a list of sequences and how each reading is compared against the set limits. The time-consuming task in this development is the reformatting of the datalog into a user-friendly arrangement for much easier data analysis.

Figure 6. Test Methodology Flowchart


We can save and examine the datalog offline if necessary. It is saved with extension of comma separated value (CSV), but can be opened in Microsoft Excel. Figure 7 shows the Save Results to File tab where we have the option to direct where to save (local or remote directory) the results.

Figure 7. Results Tab on the GUI Front Panel


Figure 8 shows the sample datalog from one of the DUTs tested. It is arranged properly so that it is easy to interpret and analyze. Before we release the tester into a production mode, we have correlated data with PSS test results from ADI offshore sites. The results correlate well in terms of passing and failing parameters. In addition, the NI PXI-based PSS tester shows better accuracy in measured data because the precision SMUs have better resolution compared to the benchtop-equivalent SMUs.

Figure 8. Sample Datalog

Advantages of Using NI PXI Modules

After we developed, correlated, and deployed the tester for new product qualification testing, we realized the following key takeaways:

  • The single setup as opposed to the traditional benchtop equivalent (Keithley and Agilent) saves an estimated \•0,000. This cost savings comes from the modules, space and energy, and development.
  • The tester weighs less than 25 kg and occupies a footprint of 1.5 x 2.5 ft (excluding workstation computer and monitor), which makes it much lighter and more compact compared to the benchtop equivalent.
  • The small form factor provides setup mobility so engineers may opt to employ in their workstations.
  • The architecture is generic, thus, can support most ADI devices. The automatic pin mapping and data generator are the key features to easily access the device functionality. We installed modules that are of the best quality; therefore, the performance is arguably much better.
  • The tester development cycle has been more efficient using LabVIEW graphical programming software.

Figure 9. New Power Supply Sequencing testers provides correct sequences, proper timing, and accurate measurement results that can guarantee the robustness of the integrated circuits prior to release to market.


Author Information:
Junifer B. Frenila
Analog Devices Inc. Philippines
Gateway Business Park, Javalera, Gen. Trias
Cavite 4107.
Tel: +63(2) 867-7030 local 8833

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