Using NI PXI and LabVIEW to Create an Automatic Test System for Mixed Signal ASIC

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"One of the main activities at FACET is providing test services of integrated circuits on wafer and packaged device levels. The FACET test room is equipped with several ATEs, and we currently test more than 60 different ASICs. One of the products we are testing is a mixed analog-digital ASIC for sensor detection, signal processing, and power switching. "

- Georgi Gegov, Application Laboratory FACET OOD

The Challenge:
Decreasing test time significantly for a mass production ASIC.

The Solution:
Changing the standard automated test equipment (ATE) with a system based on the NI PXI platform and programming the system with LabVIEW software.

Author(s):
Georgi Gegov - Application Laboratory FACET OOD
Irena Hristova - FACET OOD

One of the main activities at FACET is providing test services of integrated circuits on wafer and packaged device levels. The FACET test room is equipped with several ATEs, and we currently test more than 60 different ASICs.

One of the products we are testing is a mixed analog-digital ASIC for sensor detection, signal processing, and power switching. The test sequence is complex and consists of:

  • Continuity test
  • Static and dynamic power consumption test
  • Input leakage test
  • Test of maximum and minimum I/O levels
  • More than 30 functional tests
  • Measuring and trimming of seven parameters (writing permanent values inside the ASIC)

Due to the high production volumes, we had to significantly decrease the test time. We could not do this with our current equipment, so we bought a new tester to fulfill our needs. After researching the market for new test equipment, we found out that only NI could offer a flexible and cost efficient solution.

We chose: an NI PXIe-1078 chassis equipped with an NI PXIe-8108 embedded controller, an NI PXIe-6358 DAQ device, a PXI-4110 power supply module, a PXI-4130 SMU module, a PXI-2530 relay matrix module, and a PXI-4065 DMM. The block diagram shown below represents the system.

Results

We addressed our main challenge, which was to decrease the test time duration, without making any compromise in specification or test limit precision. We decreased test time by 35 percent.

Author Information:
Georgi Gegov
Application Laboratory FACET OOD
Samokovsko shosse 2
Sofia 1138
Bulgaria
Tel: +359 2 9781013 245
Fax: +359 2 9730485
georgi.gegov@fabless-cet.com

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