High-Performance Semiblind Demodulator Library Based on FPGA

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"LabVIEW FPGA is one of the most powerful FPGA programming tools available on the market and the key tool we used for development. It helped us shorten development time drastically compared to using text-based HDL languages."

- Orbel Sevoyan, OLYMP Engineering LLC

The Challenge:
Developing an FPGA-based, high-performance demodulation library for a data rate up to 45 MS/s.

The Solution:
Combining the benefits of FPGAs and a processor from NI to create a high-performance semiblind demodulator library.

Orbel Sevoyan - OLYMP Engineering LLC

About the Company

OLYMP Engineering, an NI Alliance Partner, specializes in RF and wireless systems. We develop various communication protocols, algorithms, and RF hardware for different applications. Our systems have already been deployed in Russia, India, and Singapore. The range of services provided by our company is constantly expanding because of modern technologies and a highly qualified personnel.

Modern communication solutions are based on specialized ICs and therefore have limited flexibility. For example, users cannot change the modulation type or add a custom coding method. Companies willing to design or create custom schemes with custom coding face this challenge. They need a tool to create software-based algorithms in order to validate their ideas and spend more time solving the problems and less time coding. We have experience developing high-performance, highly optimized FPGA-based algorithms. Customers that choose our company gain all of our experience and domain knowledge to guarantee timely delivery of the highest quality project.

Problem Background and Solution

Single carrier modulations are widely used in modern wireless communication receivers for data transmission and reception. The High-Performance Demodulator (HPD) Library provides demodulation for Phase Shift Keyed (PSK), OQPSK, FKS, MSK, and QAM data in a compact FPGA library. The demodulation mode is dynamically programmable for M=2, 4, 8, or 16 for PSK, and M=8 or 16 for QAM demodulation. The HPD Library also includes AGC, matched filtering, carrier recovery, timing recovery, and symbol decision logic to provide a complete PSK, QAM, and FSK demodulation solution for the communication systems.

The PSK demodulator core processes 16-bit baseband in-phase (I) and quadrature (Q) data. The input data rate must be 2X that of the symbol rate. The main data path includes a matched filter using a root raised cosine (RRC) filter and AGC. A matched filter eliminates intersymbol interference (ISI). Following the RRC filter, the AGC is used to maximize the dynamic range of the signal magnitude and maintain an optimal output sample level for symbol decision. Outputs of the AGC processed by the timing error detector based on the Gardner technique provide a high-performance timing error estimate. Final data after the timing error detector is processed is fine tuned to remove residual frequency offset. Finally, the symbol decision component encodes the demodulated I/Q samples into 8-bit, hard-coded symbols according to a user input mapping table. Both demodulated I/Q samples and hard-coded symbols are available at the outputs.

We used the NI PXIe-7965R module, NI PXIe-7966R module, and NI PXIe-7975R module from NI to target the HPD Library. The HPD Library is provided as a set of VIs and may be rapidly integrated into the user’s designs. It is easy to use with detailed help available.

AGC and Matched Filtering

The AGC compensates for any amplitude loss and maximizes the output dynamic range. It includes a gain error detector and a loop filter to respond to long-term variation and adjusts the gain for the demodulator. In practical communication systems, we use pulse shaping to effectively compress the transmission bandwidth. One popular pulse shaping technique is to place an RRC filter in the transmitter and another matched filter in the receiver to create a raised cosine filter. We can completely recover the symbol values without ISI if the data is sampled in the middle of the symbol period.

Timing Recovery, Carrier Recovery, and Symbol Decision

We used timing recovery to build a symbol clock synchronous to the transmitter’s clock. The timing recovery loop includes a timing error detector (TED), a loop filter, and a timing control unit. We used the Gardner timing error technique as the TED. It uses two samples per symbol to generate a timing error estimate. A second order loop filter processed this error term, which was used as the control signal to the timing control unit.

The timing control unit outputs the symbol clock to the estimating function, which calculates the actual value from the two input samples to provide maximum eye opening. We used hard decision demapping to remove the residual carrier frequency and recover the phase information in the carrier recovery component. The carrier recovery component includes a phase error detector and a second order IIR loop filter. The detected phase error is fed back to the phase error detector. Once the residual frequency is locked, the system outputs recovered I/Q data.

The input to the symbol decision are 16-bit demodulated I/Q samples from the previous step. These samples are first converted to polar coordinate representation. Encoder logic encodes the symbols based on the map table, which is a 16-bit word array that allows users to input their own coding schemes.

High-Performance Semiblind Demodulator Library Specifications

FPGA Demodulation Library
• Symbol rate up to 45 MS/s*
• Sample rate 2X symbol rate*
• Symbol locking range 0.2% of symbol rate
• Acquisition time less than 30 ms

• Eb/N0 when BER=10‐3 : 7 dB, 8 dB, 12 dB, 14 dB, 10 dB, 11 dB, 12.5 dB
• Carrier locking range as %<5 from symbol rate

*For OQPSK maximum symbol rate would be 22.5 MS/s, as it requires four samples per symbol for demodulation.

Benefits of Using NI Hardware and Software

We used the NI FPGA platform based on PXI, including the NI PXIe-5665 6.6 GHz vector signal analyzer, the NI PXIe-7966R, and additional FlexRIO FPGA modules. LabVIEW software and the LabVIEW FPGA Module made testing and validation easy. LabVIEW FPGA is one of the most powerful FPGA programming tools available on the market and the key tool we used for development. It helped us shorten development time drastically compared to using text-based HDL languages.

The benefits of our solutions include:
• FPGA-based high-performance PSK, OQPSK, and QAM demodulators
• Supports BPSK, QPSK, 8 PSK, 16 PSK, OQPSK, 8 QAM, and 16 QAM
• Symbol rates up to 45 MS/s
• Examples of using HPD Library for LabVIEW and NI PXIe-7966R and NI PXIe-7975R


Our customer’s objective was to build a system capable of automatic detection and demodulation of the majority of digital modulation types. By using the NI platform, we fulfilled all the requirements and more, achieving 25 percent higher performance than required by the customer.

Author Information:
Orbel Sevoyan
OLYMP Engineering LLC
Hovsep Emin 123
Tel: +374 (55) 688597

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