Evaluating Beam Telescope Pixel Detectors Using LabVIEW FPGA and PXI Express NI FlexRIO Hardware

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"With the flexibility of the NI FlexRIO hardware and LabVIEW graphical development system, we achieved an extremely short development time so we could concentrate on analysis algorithms rather than defining the framework."

- Matevz Cerv, European Organization for Nuclear Research

The Challenge:
Developing a reference detector (beam telescope) to evaluate pixel sensors used in high-energy particle physics experiments and quickly reconstructing the acquired data for analysis.

The Solution:
Using NI PXI Express hardware, NI FlexRIO hardware, and NI LabVIEW software to create a reliable, powerful data acquisition system for the pixel sensors used in a beam telescope.

Matevz Cerv - European Organization for Nuclear Research
Andrej Gorisek - Jožef Stefan Institute

We at the Experimental Particle Physics Department at the Jožef Stefan Institute (JSI) in Ljubljana, Slovenia, designed and developed this system to evaluate pixel sensors in physics experiments. The sensors used in the telescope setup generate digital data output, which requires a fast, reliable system to acquire, process, and log the data. We needed a data acquisition system to acquire from the six sensors in the setup that we could adapt when the setup changed.

Beam Telescopes

The detectors in high-energy particle physics must pass an evaluation before being used in experiments. We perform evaluations in test facilities equipped with high-energy particle beams provided by particle accelerators, such as the one at CERN in Switzerland. Special reference systems called beam telescopes measure the efficiency and resolution of the detectors under test (DUTs).

In the next few years, a planned upgrade of the pixel detectors inside the ATLAS experiment (A Toroidal LHC Apparatus) will occur. The need to test a large number of individual pixel sensors, and the fact that we currently lack beam telescopes, led to the necessity of developing a new telescope.

A beam telescope can detect and precisely reconstruct tracks of the high-energy charged particles that travel through the telescope’s sensors. The correlation of the tracks with the data from the DUTs gives an approximate measure of the detector’s efficiency and resolution (see Figure 1).

A beam telescope consists of multiple sensors, a triggering system, a data acquisition system, and a system for offline reconstruction and analysis (see Figure 2). When the scintillators of the triggering system detect that a charged particle traversed the sensors, the system sends a data acquisition command to the telescope and the DUT. The system logs the data from the sensors on the hard disk for later use in offline data reconstruction and analysis.

The telescope we developed at JSI Ljubljana uses six Mimosa-26 sensors with digital data output operating at 80 MHz. The full input data bandwidth required for reading these sensors is 18 data lines x 80 MHz = 180 MB/s.

Choosing the DAQ System

We initially chose hardware by the company CAEN Italy—a Versa Module Eurocard (VME) crate with the FPGA device—to perform the preliminary tests of the Mimosa-26 sensor. The drawbacks of this solution were the lack of system operation understanding and an unstable connection between the VME crate and the computer with hard disk storage.

We decided to opt for a system with interconnected modules and chose NI PXI Express hardware. With its modularity and advanced interconnectivity, the PXI Express system is reliable and meets high-performance requirements.

The NI PXIe-7962R NI FlexRIO module with the onboard FPGA is the main data acquisition and signal processing module (see Figure 3). Its 512 MB dynamic random access memory (DRAM) offers enough space to perform the data buffering. This module, together with the NI 6585 32-bit I/O module, forms a powerful synchronous reading device with 32-bit bandwidth at a frequency of up to 200 MHz. The PCI Express bus in the NI PXIe-1082 chassis delivers a fast, reliable connection between the FPGA module and the NI PXIe-8133 controller.

With the NI LabVIEW software, the individual modules seamlessly cooperate, and we wrote the host application and the FPGA code in the same environment. LabVIEW offers an easy-to-learn approach to programming, which contributes to the fast development despite the lack of previous LabVIEW coding knowledge.

System Data Flow

To achieve the required performance rates, we use the features of NI FlexRIO with a single-cycle Timed Loop in the FPGA code. The FPGA module Timed Loop differs from the standard LabVIEW Timed Loop in that its timing exactly corresponds to the clock rate of the FPGA clock specified. We implement the first-in-first-out (FIFO) buffers in the FPGA memory as well as in the PC memory. An internal FIFO buffer in the DRAM on the NI FlexRIO module stores the data history and a DMA FIFO to transfer the data from the FPGA to the PC (see Figure 4).

The system implements algorithms for overflow protection in the DMA FIFO to account for the problems transferring the data from the FPGA to the PC. Namely, the PC is not running in real time, which sometimes results in deferring the data collected from the DMA FIFOs, causing overflows and data corruption. For this reason, the algorithm on the FPGA side constantly monitors the DMA FIFOs and temporarily stops the data acquisition in case of an uncontrolled buffer filling (see Figure 5).

Onboard FPGA data processing reduces the amount of data sent to the host by up to 90 percent by performing zero suppression and other data-stacking operations. This data reduction is already enough to directly write all of the data to the hard disk, which has a bandwidth of about 60 MB/s.


Our tests at CERN proved that the NI PXI Express system is the right choice for the task. The FPGA firmware was stable and there were no losses in the FPGA-to-PC data transfer. The acquired event rate was limited only by the dead time of the Mimosa-26 sensors (see Figure 6). This implies that the data acquisition system is not the bottleneck, and we can achieve even higher rates with additional FPGA firmware development.

We later successfully reconstructed and analyzed the acquired data, confirming that there was no data corruption during acquisition and that the overflow protection performed as expected.

Time Savings and Flexibility With NI Products

With the flexibility of the NI FlexRIO hardware and LabVIEW graphical development system, we achieved an extremely short development time so we could concentrate on analysis algorithms rather than defining the framework.

Author Information:
Matevz Cerv
European Organization for Nuclear Research

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